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FS6128-04 / FS6128-05 / FS6128-06
AMERICAN MICROSYSTEMS, INC.
PLL Clock Generator IC with VCXO
April 2000
1.0
*
Features
2.0
Description
Phase-locked loop (PLL) device synthesizes output clock frequency from crystal oscillator or external reference clock On-chip tunable voltage-controlled crystal oscillator (VCXO) allows precise system frequency tuning Typically used for generation of MPEG-2 decoder clock 3.3V supply voltage Very low phase noise PLL Use with "pullable" 14pF crystals - no external padding capacitors required Small circuit board footprint (8-pin 0.150 SOIC) Custom frequency selections available - contact your local AMI Sales Representative for more information
* * * * * * *
The FS6128 is a monolithic CMOS clock generator IC designed to minimize cost and component count in digital video/audio systems. At the core of the FS6128 is circuitry that implements a voltage-controlled crystal oscillator (VCXO) when an external resonator (nominally 13.5MHz) is attached. The VCXO allows device frequencies to be precisely adjusted for use in systems that have frequency matching requirements, such as digital satellite receivers. A high-resolution phase-locked loop generates an output clock (CLK) through a post-divider. The CLK frequency is ratiometrically derived from the VCXO frequency. The locking of the CLK frequency to other system reference frequencies can eliminate unpredictable artifacts in video systems and reduce electromagnetic interference (EMI) due to frequency harmonic stacking.
Table 1: Crystal / Output Frequencies Figure 1: Pin Configuration
DEVICE fXIN (MHz) 13.500 13.500 13.500 CLK (MHz) 27.000 13.500 54.000
XIN VDD XTUNE VSS
1
8
XOUT VSS n/c CLK
FS6128-04 FS6128-05 FS6128-06
FS6128
2 3 4
7 6 5
NOTE: Contact AMI for custom PLL frequencies
8-pin (0.150 ) SOIC
Figure 2: Block Diagram
XIN VCXO XOUT XTUNE PLL DIVIDER CLK
FS6128-04 FS6128-05 FS6128-06
American Microsystems, Inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
ISO9001
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
PLL Clock Generator IC with VCXO
AMERICAN MICROSYSTEMS, INC.
April 2000
Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input, DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN 1 2 3 4 5 6 7 8
TYPE AI P AI P DO DO AO
NAME XIN VDD XTUNE VSS CLK n/c VSS XOUT VCXO Feedback Power Supply (+3.3V) VCXO Tune Ground Clock Output No Connection Ground VCXO Drive
DESCRIPTION
3.0
3.1
Functional Block Description
Voltage-Controlled Crystal Oscillator (VCXO)
EXAMPLE: A crystal with the following parameters is used: C1 = 0.025pF and C0 = 6pF. Using the minimum and maximum CL1 = 10pF, and CL2 = 20pF, the tuning range (peak-to-peak) is:
The VCXO provides a tunable, low-jitter frequency reference for the rest of the FS6128 system components. Loading capacitance for the crystal is internal to the FS6128. No external components (other than the resonator itself) are required for operation of the VCXO. Continuous fine-tuning of the VCXO frequency is accomplished by varying the voltage on the XTUNE pin. The value of this voltage controls the effective capacitance presented to the crystal. The actual amount that this load capacitance change will alter the oscillator frequency depends on the characteristics of the crystal as well as the oscillator circuit itself. It is important that the crystal load capacitance is specified correctly to "center" the tuning range. See Table 5. A simple formula to obtain the "pulling" capability of a crystal oscillator is:
f =
0.025 x (20 - 10) x 106 = 300 ppm . 2 x (6 + 20) x (6 + 10 )
3.2
Phase-Locked Loop (PLL)
The on-chip PLL is a standard frequency- and phaselocked loop architecture. The PLL multiplies the reference oscillator frequency to the desired output frequency by a ratio of integers. The frequency multiplication is exact with a zero synthesis error (unless otherwise specified).
f ( ppm) =
C1 x (C L 2 - C L1) x 10 2 x (C 0 + C L 2 ) x (C 0 + C L1)
6
where: C0 = the shunt (or holder) capacitance of the crystal C1 = the motional capacitance of the crystal CL1 and CL2 = the two extremes (minimum and maximum) of the applied load capacitance presented by the FS6128.
ISO9001
2
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
AMERICAN MICROSYSTEMS, INC.
PLL Clock Generator IC with VCXO
April 2000
4.0
Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability.
PARAMETER Supply Voltage (VSS = ground) Input Voltage, dc Output Voltage, dc Input Clamp Current, dc (VI < 0 or VI > VDD) Output Clamp Current, dc (VI < 0 or VI > VDD) Storage Temperature Range (non-condensing) Ambient Temperature Range, Under Bias Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL VDD VI VO IIK IOK TS TA TJ
MIN. VSS-0.5 VSS-0.5 VSS-0.5 -50 -50 -65 -55
MAX. 7 VDD+0.5 VDD+0.5 50 50 150 125 125 260 2
UNITS V V V mA mA C C C C kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge.
Table 4: Operating Conditions
PARAMETER Supply Voltage Ambient Operating Temperature Range Crystal Resonator Frequency SYMBOL VDD TA fXTAL Fundamental Mode CONDITIONS/DESCRIPTION 3.3V 10% MIN. 3.0 0 12 13.5 TYP. 3.3 MAX. 3.6 70 18 UNITS V C MHz
ISO9001
3
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
PLL Clock Generator IC with VCXO
AMERICAN MICROSYSTEMS, INC.
April 2000
Table 5: DC Electrical Specifications
Unless otherwise stated, VDD = 3.3V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are 3 f rom typical. Negative currents indicate current flows out of the device.
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Supply Current, Static
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
IDD IDD
fXTAL = 13.5MHz; CL = 10pF, VDD = 3.6V XIN = 0V, VDD = 3.6V
30 3
mA mA
Voltage Controlled Crystal Oscillator (contact factory for approved crystal sources or other application assistance) Crystal Loading Capacitance at Center Tuning Voltage Crystal Resonator Motional Capacitance XTUNE Effective Range Synthesized Load Capacitance Min. Synthesized Load Capacitance Max. VCXO Tuning Range VCXO Tuning Characteristic Crystal Drive Level Clock Output (CLK) High-Level Output Source Current * Low-Level Output Sink Current * Output Impedance * Short Circuit Source Current * Short Circuit Sink Current * IOH IOL zOH zOL IOSH IOSL VO = 2.0V VO = 0.4V VO = 0.1VDD; output driving high VO = 0.1VDD; output driving low VO = 0V; shorted for 30s, max. VO = 3.3V; shorted for 30s, max. -40 17 25 25 -55 55 mA mA mA mA CL1 CL2
@V(XTUNE)=minimum value @V(XTUNE)=maximum value fXTAL = 13.5MHz; CL(xtal) = 14pF; C1(xtal) = 25fF (peak-to-peak)
CL(xtal) C1
Order crystal for this capacitance (parallel load) at desired center frequency Specified motional capacitance of the crystal will affect pullability (see text) 0
14 25 3 10 20 300 150 200
pF fF V pF pF ppm ppm/V uW
Note: positive change of XTUNE = positive change of VCXO frequency RXTAL=20; CL = 20pF
ISO9001
4
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
AMERICAN MICROSYSTEMS, INC.
PLL Clock Generator IC with VCXO
April 2000
Table 6: AC Timing Specifications
Unless otherwise stated, VDD = 3.3V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are 3 f rom typical.
PARAMETER Overall VCXO Stabilization Time * PLL Stabilization Time * Synthesis Error Clock Output (CLK) Duty Cycle * Jitter, Period (peak-peak) * Jitter, Long Term (y( )) * Rise Time * Fall Time *
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
tVCXOSTB tPLLSTB
From power valid From VCXO stable (unless otherwise noted in Frequency Table)
10 100 0
ms us ppm
Ratio of high pulse width (as measured from rising edge to next falling edge at VDD/2) to one clock period tj(P) tj(LT) tr tf From rising edge to next rising edge at VDD/2, CL = 10pF From 0-500s at VDD/2, CL = 10pF compared to ideal clock source VDD = 3.3V; VO = 0.3V to 3.0V; CL = 10pF VDD = 3.3V; VO = 3.0V to 0.3V; CL = 10pF
45 200 100 1.7 1.7
55
% ps ps ns ns
ISO9001
5
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
PLL Clock Generator IC with VCXO
AMERICAN MICROSYSTEMS, INC.
April 2000
5.0
Package Information
Table 7: 8-pin SOIC (0.150") Package Dimensions
DIMENSIONS INCHES MIN. A A1 A2 B C D E e H h L 0.061 0.004 0.055 0.013 0.0075 0.189 0.150 0.230 0.010 0.016 0 MAX. 0.068 0.0098 0.061 0.019 0.0098 0.196 0.157 0.244 0.016 0.035 8 MILLIMETERS MIN. 1.55 0.102 1.40 0.33 0.191 4.80 3.81 5.84 0.25 0.41 0 MAX. 1.73 0.249 1.55 0.49 0.249 4.98 3.99 6.20 0.41 0.89 8
BASE PLANE 1 ALL RADII: 0.005" TO 0.01"
R
8
E
H
AMERICAN MICROSYSTEMS, INC.
h x 45 B e A2 A D A1
SEATING PLANE
7 typ.
0.050 BSC
1.27 BSC
C L
Table 8: 8-pin SOIC (0.150") Package Characteristics
PARAMETER Thermal Impedance, Junction to Free-Air 8-pin 0.150" SOIC Lead Inductance, Self Lead Inductance, Mutual Lead Capacitance, Bulk SYMBOL JA L11 L12 C11 CONDITIONS/DESCRIPTION Air flow = 0 m/s Corner lead Center lead Any lead to any adjacent lead Any lead to VSS TYP. 110 2.0 1.6 0.4 0.27 UNITS C/W nH nH pF
ISO9001
6
4.24.00
FS6128-04 / FS6128-05 / FS6128-06
AMERICAN MICROSYSTEMS, INC.
PLL Clock Generator IC with VCXO
April 2000
6.0
Ordering Information
Table 9: Device Ordering Codes
ORDERING CODE DEVICE NUMBER PACKAGE TYPE 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) OPERATING TEMPERATURE RANGE 0 C to 70 C (Commercial) 0 C to 70 C (Commercial) 0 C to 70 C (Commercial) 0 C to 70 C (Commercial) 0 C to 70 C (Commercial) 0 C to 70 C (Commercial) SHIPPING CONFIGURATION Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes
11640-825 11640-835 11640-102 11640-112 11640-103 11640-113
FS6128-04 FS6128-04 FS6128-05 FS6128-05 FS6128-06 FS6128-06
7.0
Revision Information
DATE 1/21/00 4/24/00 PAGE 1 5 DESCRIPTION Fixed typographical error Fixed formatting error
Copyright (c) 2000 American Microsystems, Inc.
Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMI for such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796, WWW Address: http://www.amis.com E-mail: tgp@amis.com
ISO9001
7
4.24.00

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